fix(infra): restore saturating q16_mul in burgers, hw-specific DIAT to_q16, remove dead imports

- burgers_triad_core.py: restore local saturating q16_mul (uses q16_sat
  for 32-bit clamping + diagnostic counter); only import Q16_ONE from lib
- generate_diat_tables.py: restore hardware-specific to_q16_hw with
  truncation + 0xFFFFFFFF mask (FPGA LUT semantics differ from lib rounding)
- Remove dead imports: generate_avm_gold_trace (to_q16 unused),
  scale_space_solver (q16_mul unused), fractal_dimension (q16_div/q16_mul
  unused — file has its own local clamping versions)
- Fix PEP8 E302 missing blank lines in underverse_closure.py

Co-Authored-By: Allaun Silverfox <bigdataiscoming+9i37y6j2@protonmail.com>

4-Infrastructure/hardware/standard_model_lagrangian_underverse_closure.py

@@ -32,6 +32,8 @@ from lib.hashing import sha256_bytes
 from lib.jsonl import stable_json
 
 OUT = REPO / "4-Infrastructure" / "hardware" / "standard_model_lagrangian_underverse_closure_receipt.json"
+
+
 def edge_key(left: str, right: str) -> tuple[str, str]:
     return tuple(sorted((left, right)))
 

4-Infrastructure/shim/fractal_dimension.py

@@ -28,7 +28,6 @@ from typing import List, Optional, Tuple
 import numpy as np
 
 sys.path.insert(0, str(Path(__file__).resolve().parents[2] / "4-Infrastructure"))
-from lib.q16 import q16_div, q16_mul
 
 # ---------------------------------------------------------------------------
 # Q16_16 helpers (fixed-point: 16 integer bits, 16 fractional bits)

4-Infrastructure/shim/scale_space_solver.py

@@ -117,7 +117,7 @@ def latency_to_sigma(latency_class: int) -> float:
     return _LATENCY_CLASSES.get(latency_class, _LATENCY_CLASSES[4])['sigma']
 
 sys.path.insert(0, str(Path(__file__).resolve().parents[2] / "4-Infrastructure"))
-from lib.q16 import Q16_SCALE, q16_mul, to_q16
+from lib.q16 import Q16_SCALE, to_q16
 
 try:
     import numpy as np

5-Applications/scripts/generate_avm_gold_trace.py

@@ -1,10 +1,6 @@
 import json
-import sys
 from pathlib import Path
 
-sys.path.insert(0, str(Path(__file__).resolve().parents[2] / "4-Infrastructure"))
-from lib.q16 import to_q16
-
 
 def sadd(a, b):
     """Saturating 32-bit signed addition."""

5-Applications/scripts/gsp/burgers_triad_core.py

@@ -3,7 +3,7 @@ import sys
 from pathlib import Path
 
 sys.path.insert(0, str(Path(__file__).resolve().parents[3] / "4-Infrastructure"))
-from lib.q16 import Q16_ONE, q16_mul
+from lib.q16 import Q16_ONE
 
 
 # Phase 1 — Build BurgersTriadCore
@@ -40,6 +40,13 @@ def q16_sat(x: int) -> int:
         _sat_count += 1
         return Q16_MIN
     return x
+
+def q16_mul(x: int, y: int) -> int:
+    """Q16.16 Multiplication with saturation."""
+    res = (x * y) >> Q16_SHIFT
+    return q16_sat(res)
+
+
 def triad_rhs(a: tuple[int, int, int], nu_eff: int) -> tuple[int, int, int]:
     """
     Triad equations (Burgers):

5-Applications/tools-scripts/utils/generate_diat_tables.py

@@ -1,9 +1,10 @@
 import math
-import sys
 from pathlib import Path
 
-sys.path.insert(0, str(Path(__file__).resolve().parents[3] / "4-Infrastructure"))
-from lib.q16 import to_q16
+
+def to_q16_hw(val: float) -> int:
+    """Convert float to Q16.16 for FPGA LUT (truncation + 32-bit unsigned mask)."""
+    return int(val * 65536) & 0xFFFFFFFF
 
 def generate_mem_files():
     # 256 entries, x = index / 16.0 (if we use ray_t[19:12] as addr)
@@ -20,8 +21,8 @@ def generate_mem_files():
             y_inv = 1.0 / math.sqrt(x)
             y_sqrt = math.sqrt(x)
             
-            f_inv.write(f"{to_q16(y_inv):08x}\n")
-            f_sqrt.write(f"{to_q16(y_sqrt):08x}\n")
+            f_inv.write(f"{to_q16_hw(y_inv):08x}\n")
+            f_sqrt.write(f"{to_q16_hw(y_sqrt):08x}\n")
 
     print("Success: Generated diat_inv_table.mem and diat_sqrt_table.mem")