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fix: Blitter UART divisor 234→233 to match Lean uartBaudDivisor proof
Both now 115384 baud at 27MHz (within 0.16% of 115200). Lean theorem uartBaudRateHz_within_1pct_of_115200 applies to both.
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@ -233,7 +233,7 @@ module Blitter6502OISC (
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reg [9:0] uart_shift;
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reg [9:0] uart_shift;
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reg uart_active;
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reg uart_active;
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localparam UART_DIV = 16'd234; // ~115200 baud at 27MHz
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localparam UART_DIV = 16'd233; // 115384 baud at 27MHz (matches Lean uartBaudDivisor)
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always @(posedge clk or negedge rst_n) begin
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always @(posedge clk or negedge rst_n) begin
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if (!rst_n) begin
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if (!rst_n) begin
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