Brandon Schneider
|
09f2f3044a
|
feat: unified FPGA bitstream for Tang Nano 9K — BUILD SUCCESSFUL
research_stack_top.fs (2.0MB) — all modules synthesized:
- Blitter6502OISC (4K memory, SUBTLEQ CPU)
- q16_lut_core (Q16_16 arithmetic, 8 ops)
- blitter_memory_map (8-bit ↔ 32-bit bridge)
- voltage_mode_controller (4 BRAM modes)
- scale_space_bram (Gaussian kernel banks)
- highs_pivot_accelerator (simplex pipeline)
Timing: 195.92 MHz (PASS at 27 MHz target, 7.2x margin)
Device: GW1NR-LV9QN88PC6/I5 (Tang Nano 9K)
To flash: openFPGALoader -b tangnano9k research_stack_top.fs
|
2026-05-28 16:32:05 -05:00 |
|