Commit graph

7 commits

Author SHA1 Message Date
Brandon Schneider
a6311ed940 chore: preserve working tree before secure wipe
- Update .gitignore with **/target/ for Rust build artifacts
- Add eval receipts to UniversalBridge.lean (compile-time verification comments)
- Add PCIe Idle-Cycle Compute Harvester to ROADMAP.md
- Clean up deprecated scripts, generated Verilog, and old tools (23 deletions)
- Stage new infrastructure: Xen/Alpine embedded surface, QFOX topology manager
- Stage new probes: boundary activation field, holographic carving
- Stage new applications: finance manager, script roots
- Stage new research spec: PCIe idle-cycle substrate
2026-05-13 17:36:02 -05:00
Brandon Schneider
a99e839bab Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
Brandon Schneider
1225404b72 Point ENE scripts at shared data 2026-05-11 22:10:55 -05:00
Brandon Schneider
eff316ff3f wip: refined investigation script for Erdős–Gyárfás conjecture
Created refined investigation script for Erdős–Gyárfás conjecture
where previous test found no power-of-two cycles (conjecture holds: False).

Refinements:
- Regular graph construction (all vertices same degree)
- Exhaustive DFS cycle detection
- More samples per n (5 instead of 3)
- Extended n values [8, 10, 12, 14, 16]

Goal: Determine if previous negative result was due to random graph construction
or if regular graphs with exhaustive cycle detection find power-of-two cycles.

Script created: investigate_erdos_gyarfas_refined.py
Execution canceled by user - awaiting further instructions.
2026-05-08 14:50:03 -05:00
Brandon Schneider
0cf775c80e collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution
- Prover-Integrated Orchestration Layers (L0-L3): Goedel-Prover-V2 watchdog, BFS-Prover-V2 swarm consensus, bf4prover topology adaptation
- FAMM Verilator benchmark: uniform vs preshaped delay comparison (4.4x speedup)
- Swarm topological device prober: 11 agents probing traces, caps, delays, errors, vias, PDN
- Spec sheet puller: 10 components with key params and topological relevance
- Virtual FPGA system tests: 6/6 passed, 134K ops/s throughput
- Fixed merge conflicts in AI-Newton test_experiment.ipynb
2026-05-06 23:42:01 -05:00
Brandon Schneider
0709b298b3 Consolidate research stack updates 2026-05-05 21:09:48 -05:00
Brandon Schneider
5f88abf618 initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00