Brandon Schneider
cd4cb7c507
feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT
...
Pipeline wiring:
- vcn_compute_substrate.py: Delta+RLE → RS ECC → ChaCha20 now in live path
- encode_braid_strand/crossing/mountain_merge accept key + compress params
- New CLI: encode_enhanced/decode_enhanced for full pipeline
- 67/67 tests pass
FPGA synthesis:
- q16_lut_core → Tang Nano 9K (GW1NR-9C)
- 266 LUTs, 68 FFs, 2 DSPs, 1 BRAM
- 3.4MB bitstream (q16_lut_top.fs)
- Constraint file + build script + wrapper module
2026-05-28 15:02:13 -05:00
Brandon Schneider
31b2f1f66f
feat(infra): compile and SRAM-flash UART beacon with reset bypass
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Synthesized and placed-and-routed the UART beacon design on Tang Nano 9K with physical reset bypassed (rst_n_internal = 1'b1). Programmed the SRAM using openFPGALoader (CRC check: Success). Verified the physical UART blockage due to BL702 bridge firmware limitations via local probe, confirming the virtual serial route (virtual://q16-pty) as the active verification path. Updated scoped AGENTS.md files with the latest hardware status and Lean build baselines.
Build: 3313 jobs, 0 errors (lake build)
2026-05-28 14:10:46 -05:00
Brandon Schneider
e203a5215e
feat(hardware): Emergency Boot Witness reference implementation
...
Add compiling Lean modules and Python shim for the Geometry Emergency
Boot Witness specification (graphene supercapacitor geometric encoding).
Lean modules (Semantics.Hardware.EmergencyBoot.*):
- EmergencyBootTypes: HexCoord, CapClass, OpticalPath, VoltageDifferential,
GrapheneMemristor, HybridOpticalPath, material properties
- EmergencyBootState: PowerState, SolarPowerState, ScanState, seed assembly,
emergency boot state machine with 6502 calculator efficiency targets
- EmergencyBootShell: Command opcodes, status byte encoding, process
definitions, executeCommand dispatch
All use Q16_16 fixed-point arithmetic (no Float in compute paths).
Verified theorems: utilizationWithinBounds, powerFailureMonotonic,
commandOpcode_roundTrip.
Python shim (4-Infrastructure/hardware/emergency_boot/):
- EmergencyBootEngine simulating FPGA geometric scan and seed extraction
- Demo CLI showing power failure → self-powered calculator mode →
geometric scan → seed assembly flow
Build: 3302 jobs, 0 errors (narrow target), 3313 jobs, 0 errors (Compiler)
Generated with [Devin](https://cli.devin.ai/docs )
Co-Authored-By: Devin <158243242+devin-ai-integration[bot]@users.noreply.github.com>
2026-05-27 23:00:39 -05:00
Brandon Schneider
a99e839bab
Track remaining source and documentation inventory
2026-05-11 22:18:31 -05:00
Brandon Schneider
29f9b78b6d
Stage stack solidification source slice
2026-05-11 22:08:10 -05:00
Brandon Schneider
0cf775c80e
collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution
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- Prover-Integrated Orchestration Layers (L0-L3): Goedel-Prover-V2 watchdog, BFS-Prover-V2 swarm consensus, bf4prover topology adaptation
- FAMM Verilator benchmark: uniform vs preshaped delay comparison (4.4x speedup)
- Swarm topological device prober: 11 agents probing traces, caps, delays, errors, vias, PDN
- Spec sheet puller: 10 components with key params and topological relevance
- Virtual FPGA system tests: 6/6 passed, 134K ops/s throughput
- Fixed merge conflicts in AI-Newton test_experiment.ipynb
2026-05-06 23:42:01 -05:00
Brandon Schneider
0709b298b3
Consolidate research stack updates
2026-05-05 21:09:48 -05:00
Brandon Schneider
5f88abf618
initial: sovereign research stack (consolidated, weightless, and lfs-optimized)
2026-05-04 18:11:36 -05:00
