created: 20260507000000000
modified: 20260507000000000
tags: ResearchStack Hardware ASIC FPGA Semiconductor
title: ASIC Topology
type: text/vnd.tiddlywiki

! ASIC Topology

ASIC topology (`0-Core-Formalism/lean/Semantics/Semantics/ASICTopology.lean`) formalizes hardware layout as a topological routing problem. Defines die-level addressing, interconnect topology, and timing closure as manifold invariants. The ASIC nanokernel stream adapter (`5-Applications/scripts/asic_nanokernel_stream_adapter.py`) bridges the GCL nanokernel to ASIC streaming interfaces. FPGA implementations include the Tang Nano 9K AVM tester and Morphic Scalar FAMM in Verilog (`4-Infrastructure/hardware/verilog/morphic_scalar_famm.v`). The hardware extraction pipeline targets Gowin FPGA fabric via [[FPGA Warden]]. ASIC/FPGA co-design uses the blitter 6502 OISC architecture for minimal-instruction-set compression.

* [[FPGA Warden]]
* [[GCL Nanokernel]]
* [[HDMI Compute Fabric]]
* [[Morphic DSP]]