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232 lines
8.2 KiB
Verilog
232 lines
8.2 KiB
Verilog
// S3C Manifold FPGA Implementation
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// Derived from Lean: Semantics/S3C.lean
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// Target: Gowin GW1NR-9 (Tang Nano 9K)
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// Q16.16 fixed-point arithmetic
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// Implements genus-3 topological manifold for audio processing
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`timescale 1ns / 1ps
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`include "s3c_core.v"
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// ═══════════════════════════════════════════════════════════════════════════
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// S3C 3-Handle Manifold
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// Maps audio sample to 3-handle manifold structure
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// ═══════════════════════════════════════════════════════════════════════════
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module s3c_manifold_handle (
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input wire [15:0] sample,
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output wire [15:0] handleK, // Coarse handle (amplitude envelope)
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output wire [15:0] handleA, // Medium handle (spectral content)
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output wire [15:0] handleB // Fine handle (phase information)
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);
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wire [15:0] k, a, b;
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wire [31:0] mass;
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wire [15:0] width;
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s3c_shell_decomposition shell_inst (
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.n(sample),
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.k(k),
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.a(a),
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.b(b),
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.mass(mass),
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.width(width)
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);
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assign handleK = k;
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assign handleA = a;
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assign handleB = b;
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endmodule
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// ═══════════════════════════════════════════════════════════════════════════
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// S3C Audio Processing Pipeline
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// Complete S3C manifold processing for audio samples
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// ═══════════════════════════════════════════════════════════════════════════
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module s3c_audio_processor (
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input wire clk,
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input wire rst_n,
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input wire [15:0] audio_sample, // Unsigned 16-bit audio sample
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output reg [15:0] handleK,
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output reg [15:0] handleA,
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output reg [15:0] handleB,
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output reg [31:0] massResonance,
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output reg [31:0] mirrorResonance,
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output reg [31:0] spectralCoupling,
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output reg [31:0] jScore,
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output reg emit
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);
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// Pipeline Stage 1: Manifold handles
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wire [15:0] handleK_stage1, handleA_stage1, handleB_stage1;
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reg [15:0] handleK_stage1_reg, handleA_stage1_reg, handleB_stage1_reg;
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s3c_manifold_handle manifold_inst (
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.sample(audio_sample),
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.handleK(handleK_stage1),
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.handleA(handleA_stage1),
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.handleB(handleB_stage1)
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);
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always @(posedge clk or negedge rst_n) begin
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if (!rst_n) begin
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handleK_stage1_reg <= 16'd0;
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handleA_stage1_reg <= 16'd0;
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handleB_stage1_reg <= 16'd0;
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end else begin
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handleK_stage1_reg <= handleK_stage1;
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handleA_stage1_reg <= handleA_stage1;
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handleB_stage1_reg <= handleB_stage1;
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end
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end
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// Pipeline Stage 2: Contact detection + J-score
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wire kappaA_stage2, kappaB_stage2, kappaC_stage2;
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wire [31:0] massResonance_stage2, mirrorResonance_stage2, spectralCoupling_stage2, jScore_stage2;
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reg kappaA_stage2_reg, kappaC_stage2_reg;
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reg [31:0] massResonance_stage2_reg, mirrorResonance_stage2_reg, spectralCoupling_stage2_reg, jScore_stage2_reg;
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s3c_three_point_contact contact_inst (
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.handleK(handleK_stage1_reg),
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.handleA(handleA_stage1_reg),
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.handleB(handleB_stage1_reg),
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.kappaA(kappaA_stage2),
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.kappaB(kappaB_stage2),
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.kappaC(kappaC_stage2)
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);
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s3c_j_score jscore_inst (
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.handleK(handleK_stage1_reg),
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.handleA(handleA_stage1_reg),
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.handleB(handleB_stage1_reg),
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.massResonance(massResonance_stage2),
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.mirrorResonance(mirrorResonance_stage2),
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.spectralCoupling(spectralCoupling_stage2),
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.total(jScore_stage2)
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);
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always @(posedge clk or negedge rst_n) begin
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if (!rst_n) begin
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kappaA_stage2_reg <= 1'b0;
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kappaC_stage2_reg <= 1'b0;
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massResonance_stage2_reg <= 32'd0;
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mirrorResonance_stage2_reg <= 32'd0;
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spectralCoupling_stage2_reg <= 32'd0;
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jScore_stage2_reg <= 32'd0;
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end else begin
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kappaA_stage2_reg <= kappaA_stage2;
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kappaC_stage2_reg <= kappaC_stage2;
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massResonance_stage2_reg <= massResonance_stage2;
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mirrorResonance_stage2_reg <= mirrorResonance_stage2;
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spectralCoupling_stage2_reg <= spectralCoupling_stage2;
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jScore_stage2_reg <= jScore_stage2;
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end
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end
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// Pipeline Stage 3: Emission gate
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wire emit_stage3;
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s3c_emission_gate emission_inst (
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.kappaA(kappaA_stage2_reg),
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.kappaC(kappaC_stage2_reg),
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.jScore(jScore_stage2_reg),
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.emit(emit_stage3)
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);
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// Output registers
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always @(posedge clk or negedge rst_n) begin
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if (!rst_n) begin
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handleK <= 16'd0;
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handleA <= 16'd0;
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handleB <= 16'd0;
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massResonance <= 32'd0;
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mirrorResonance <= 32'd0;
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spectralCoupling <= 32'd0;
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jScore <= 32'd0;
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emit <= 1'b0;
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end else begin
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handleK <= handleK_stage1_reg;
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handleA <= handleA_stage1_reg;
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handleB <= handleB_stage1_reg;
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massResonance <= massResonance_stage2_reg;
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mirrorResonance <= mirrorResonance_stage2_reg;
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spectralCoupling <= spectralCoupling_stage2_reg;
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jScore <= jScore_stage2_reg;
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emit <= emit_stage3;
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end
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end
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endmodule
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// ═══════════════════════════════════════════════════════════════════════════
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// S3C Testbench
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// ═══════════════════════════════════════════════════════════════════════════
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module s3c_audio_processor_tb;
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reg clk;
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reg rst_n;
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reg [15:0] audio_sample;
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wire [15:0] handleK;
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wire [15:0] handleA;
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wire [15:0] handleB;
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wire [31:0] massResonance;
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wire [31:0] mirrorResonance;
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wire [31:0] spectralCoupling;
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wire [31:0] jScore;
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wire emit;
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// Instantiate DUT
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s3c_audio_processor dut (
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.clk(clk),
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.rst_n(rst_n),
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.audio_sample(audio_sample),
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.handleK(handleK),
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.handleA(handleA),
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.handleB(handleB),
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.massResonance(massResonance),
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.mirrorResonance(mirrorResonance),
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.spectralCoupling(spectralCoupling),
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.jScore(jScore),
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.emit(emit)
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);
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// Clock generation
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initial clk = 0;
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always #18.5185 clk = ~clk; // 27MHz
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// Test stimulus
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initial begin
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// Initialize
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rst_n = 0;
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audio_sample = 16'd0;
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#100;
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rst_n = 1;
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#100;
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// Test samples (matching Python test)
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audio_sample = 16'd100;
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#100;
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$display("Sample 100: k=%d, a=%d, b=%d, mass=%d, emit=%b",
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handleK, handleA, handleB, massResonance, emit);
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audio_sample = 16'd256;
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#100;
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$display("Sample 256: k=%d, a=%d, b=%d, mass=%d, emit=%b",
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handleK, handleA, handleB, massResonance, emit);
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audio_sample = 16'd1000;
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#100;
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$display("Sample 1000: k=%d, a=%d, b=%d, mass=%d, emit=%b",
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handleK, handleA, handleB, massResonance, emit);
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audio_sample = 16'd5000;
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#100;
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$display("Sample 5000: k=%d, a=%d, b=%d, mass=%d, emit=%b",
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handleK, handleA, handleB, massResonance, emit);
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audio_sample = 16'd10000;
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#100;
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$display("Sample 10000: k=%d, a=%d, b=%d, mass=%d, emit=%b",
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handleK, handleA, handleB, massResonance, emit);
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#100;
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$finish;
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end
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endmodule
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