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42 lines
1,000 B
Makefile
42 lines
1,000 B
Makefile
# Verilator simulation Makefile for SparkleTangNano9KTop
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# Usage:
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# make — build and run simulation
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# make trace — build and run with VCD waveform dump
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# make clean — remove build artifacts
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TOP := SparkleTangNano9KTop
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PWD := $(shell pwd)
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RTL_TOP := "$(PWD)/../SparkleTangNano9KTop.v"
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RTL_PAYLOAD := "$(PWD)/../../generated/sparkle_phi_s3c_payload.sv"
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TB_CPP := "$(PWD)/tb_$(TOP).cpp"
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BUILD_DIR := /tmp/verilator_sparkle_sim
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SIM_BIN := $(BUILD_DIR)/V$(TOP)
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# Verilator flags
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VERILATOR := verilator
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VERILATOR_FLAGS := -Wall -Wpedantic -Wno-fatal \
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-cc --exe --build --trace \
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-Mdir $(BUILD_DIR) \
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--top-module $(TOP)
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# Source files (absolute paths)
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VSRCS := $(RTL_TOP) $(RTL_PAYLOAD)
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.PHONY: all trace run clean
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all: $(SIM_BIN)
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./$(SIM_BIN)
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trace: $(SIM_BIN)
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TRACE=1 ./$(SIM_BIN)
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$(SIM_BIN): $(VSRCS) $(TB_CPP)
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$(VERILATOR) $(VERILATOR_FLAGS) $(VSRCS) $(TB_CPP)
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mv $(BUILD_DIR)/V$(TOP) $(SIM_BIN)
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run: $(SIM_BIN)
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./$(SIM_BIN)
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clean:
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rm -rf $(BUILD_DIR) *.vcd
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