Research-Stack/0-Core-Formalism
Brandon Schneider 31b2f1f66f feat(infra): compile and SRAM-flash UART beacon with reset bypass
Synthesized and placed-and-routed the UART beacon design on Tang Nano 9K with physical reset bypassed (rst_n_internal = 1'b1). Programmed the SRAM using openFPGALoader (CRC check: Success). Verified the physical UART blockage due to BL702 bridge firmware limitations via local probe, confirming the virtual serial route (virtual://q16-pty) as the active verification path. Updated scoped AGENTS.md files with the latest hardware status and Lean build baselines.

Build: 3313 jobs, 0 errors (lake build)
2026-05-28 14:10:46 -05:00
..
core Remove legacy Python prototypes superseded by Lean formalization 2026-05-19 15:34:17 +00:00
lean feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
otom Add Phys.org May 2026 source intake for bees, biocoatings, THz, and diamond membranes 2026-05-23 19:27:37 -05:00
receipts docs: add bio optical witness living light equations 2026-05-09 20:53:51 -05:00
rust/ftdi_gimbal initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
README.md initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00

0-Core-Formalism

Purpose: Formal foundations for the entire Research Stack — Lean modules, bind primitive, Triumvirate consensus, core source.

No external dependencies. All other layers depend on this.

Contents (Target)

Source Destination
0-Core-Formalism/lean/Semantics/ 0-Core-Formalism/lean/Semantics/
core/ 0-Core-Formalism/core/

Concepts

  • bind — State → (State → Action) → State
  • TriumvirateClock — ternary consensus (ADD/PAUSE/SUBTRACT)
  • Builder/Judge/Warden — roles mapped to hardware registers
  • OTOM — Ordered Transformation & Orchestration Model

Build

cd "0-Core-Formalism"
lake build