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Architectural plan for Tailscale mesh + Ray + VCN + compute surfaces. 5-layer stack: 1. Tailscale connects everything (WireGuard, DERP relay) 2. Ray schedules work across the mesh 3. VCN compresses data (50x bandwidth reduction) 4. FrameDispatcher routes by tag 5. Compute surfaces execute (GPU/CPU/Ethernet/framebuffer/MCU) Key insight: every device in the Tailscale mesh is a potential compute node. Framebuffer and Ethernet surfaces turn devices that "cant run Ray" into compute participants. 4 phases: 1. Ray over Tailscale (mostly done) 2. Multi-tier scheduling (probe done, placement pending) 3. Framebuffer + Ethernet integration (host-side pending) 4. Edge devices (ESP32, 1-Wire sensors) |
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| .. | ||
| arr-stack-plan.md | ||
| authentik-setup.md | ||
| ene-contextstream-equivalent.md | ||
| infrastructure-status.md | ||
| k3s-cluster-setup.md | ||
| mesh-networking-over-ray-plan.md | ||
| pqc-posture.md | ||
| usbip-mesh-transport-design.md | ||
| vcn-lupine-setup.md | ||
| vps-proxmox-status.md | ||