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Research-Stack/4-Infrastructure/hardware
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Brandon Schneider 9596c78ab9 fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 
Blitter6502OISC_small.v:
- Added uart_sent flag to prevent UART retransmission
- Verified via Verilator: UART sends exactly one byte on halt
- Test byte: 0xAA (recognizable pattern)

research_stack_top.v:
- Auto-start logic (100ms after reset, no button needed)
- LED shows heartbeat when CPU running, register values on halt

research_stack_tangnano9k.cst:
- uart_tx=17, uart_rx=18 (matches Sparkle reference design)

Simulation results (Verilator):
- uart_test.v: 115 bytes in 300K cycles (continuous TX verified)
- research_stack_top: UART fires after Blitter halt, 0xAA byte sent
- LED pattern changes from IDLE to RUNNING to HALTED
2026-05-28 21:42:11 -05:00
..
build_metamanifold Consolidate research stack updates 2026-05-05 21:09:48 -05:00
emergency_boot feat(hardware): Emergency Boot Witness reference implementation 2026-05-27 23:00:39 -05:00
sparkle fix(infra): configure sparkle build script to support system path fallback 2026-05-28 15:03:17 -05:00
abc.history initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
adaptive_fabric_connector.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
batch_lean_checker.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
batch_lean_checker.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
batch_lean_checker_parallel.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
Blitter6502OISC_small.v fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 2026-05-28 21:42:11 -05:00
blitter_memory_map.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
braid_serial.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
braid_serial_main.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
braided_field_genetic_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
braided_field_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
bram_partial_lut.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
build_cff_accelerator.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
build_cff_scanner.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
build_dvi_texel.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
build_hutter_symbol_surface.sh Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
build_loopback.sh feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
build_metamanifold_prover.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
build_metamanifold_prover_himbaechel.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
build_metamanifold_prover_yosys.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
build_q16_lut.sh feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
build_research_stack.sh feat: unified FPGA bitstream for Tang Nano 9K — BUILD SUCCESSFUL 2026-05-28 16:32:05 -05:00
build_rrc_q16_accel.sh Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
build_uart_beacon.sh Stage stack solidification source slice 2026-05-11 22:08:10 -05:00
cff_accelerator.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_accelerator.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner.fs collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner_pnr.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cmyk_adaptive_router.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
dvi_texel_transmitter.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
dvi_texel_transmitter.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
ee_stress_requirements.txt Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
ee_virtual_stress_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
famm_verilator_bench.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
FAMM_VERILATOR_SETUP.md collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
goertzel_filter_bank.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
gpu_fpga_distributed_checker.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
gpu_fpga_verification_report.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
hamiltonian_primitives_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
highs_pivot_accelerator.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
hutter_symbol_substitution_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
integrated_prover_pipeline.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
integrated_prover_report.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
jupiter_phi_self_recovery_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
lean_dependency_dag.dot Consolidate research stack updates 2026-05-05 21:09:48 -05:00
lean_dependency_dag_parallel.dot Consolidate research stack updates 2026-05-05 21:09:48 -05:00
lean_dependency_dag_parallel.svg Consolidate research stack updates 2026-05-05 21:09:48 -05:00
lean_hardware_checker.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
Makefile.metamanifold Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
mechanical_cycle.vcd initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
mechanical_cycle_harness.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
mechanical_cycle_sim initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
metamanifold.fs Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_pnr.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin.v Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin_minimal.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin_simple.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_minimal.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_minimal.v Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_tb.cpp Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_test.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_test.v Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_trace.vcd Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metaprobe_stress_sensor.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
mode_multiplexed_dsp_slice.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
moldable_transfer_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
morphic_scalar_fpga.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
morphic_scalar_fpga_optimized.cst initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
morphic_scalar_fpga_optimized.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
morphic_scalar_s3c_integrated.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
nii_surface_driver.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
noise_stability_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
pbacs_1bit_transport_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
polariton_mimo_spectrum_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
polaron_polariton_braid_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
q16_lut_top.fs feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
q16_lut_top.v feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
research_stack_tangnano9k.cst feat: unified FPGA bitstream for Tang Nano 9K — BUILD SUCCESSFUL 2026-05-28 16:32:05 -05:00
research_stack_top.fs rebuild: bitstream with corrected UART divisor (233 matching Lean proof) 2026-05-28 16:37:28 -05:00
research_stack_top.v fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 2026-05-28 21:42:11 -05:00
research_stack_top_pnr.json rebuild: bitstream with corrected UART divisor (233 matching Lean proof) 2026-05-28 16:37:28 -05:00
rgflow_codebase_reconfiguration_review.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
run_famm_verilator_bench.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
run_metamanifold_sim.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
s3c_manifold_fpga.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
scale_space_bram.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
SIGNAL_ENCODERS_DOCUMENTATION.md Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder_simple_spice.cir Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder_spice.cir Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder_tb.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_12_to_4_reduction.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_absurd_genetics_stress.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_connectome_reconfiguration_runner.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_dna_substitution_alignment.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_extension_failure_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_force_regime_model.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_genus3_residual_boat.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_lagrangian_eigen_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_lagrangian_exact_average.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_lagrangian_underverse_closure.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_projection_sensitivity_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_residual_accounting_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_rgflow_prune_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_signed_axis_graph.graphml Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_signed_axis_graph.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_underverse_manifold_shape.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_w_conservation_guard.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tangnano9k_dvi.cst collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
tangnano9k_hutter_symbol_surface.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tangnano9k_q16_lut.cst feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
tangnano9k_rrc_q16_accel.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tangnano9k_uart_beacon.v feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
tangnano9k_uart_loopback.cst initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
tangnano9k_uart_loopback.fs initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
tangnano9k_uart_loopback.json initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
tangnano9k_uart_loopback.v feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
tangnano9k_uart_loopback_pnr.json initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
tangnano9k_uart_swapped.cst Stage stack solidification source slice 2026-05-11 22:08:10 -05:00
tb_famm_bench.cpp collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
tb_hutter_symbol_substitution_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tb_metamanifold_prover.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tb_pbacs_1bit_transport_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tb_uart_test.v fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 2026-05-28 21:42:11 -05:00
test_fpga.py test: FPGA test suite — 12/12 pass 2026-05-28 19:57:45 -05:00
tmr_oepi_safety_fsm.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
topological_residual_engine.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
TOSLINK_EDGE_CARRIER_TEMPLATE.kicad_mod Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
toslink_revA_kicad_template_notes.md Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
uart_rx.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
uart_test.v fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 2026-05-28 21:42:11 -05:00
uart_tx.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
voltage_mode_controller.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
wavefront_emitter.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
wavefront_emitter_tb.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00