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Synthesized and placed-and-routed the UART beacon design on Tang Nano 9K with physical reset bypassed (rst_n_internal = 1'b1). Programmed the SRAM using openFPGALoader (CRC check: Success). Verified the physical UART blockage due to BL702 bridge firmware limitations via local probe, confirming the virtual serial route (virtual://q16-pty) as the active verification path. Updated scoped AGENTS.md files with the latest hardware status and Lean build baselines. Build: 3313 jobs, 0 errors (lake build)
52 lines
1.2 KiB
Bash
Executable file
52 lines
1.2 KiB
Bash
Executable file
#!/usr/bin/env bash
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set -euo pipefail
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# Configuration
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TOP="tangnano9k_uart_loopback"
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DEVICE="GW1NR-LV9QN88PC6/I5"
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FAMILY="GW1N-9C"
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FREQ_MHZ="27"
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CST="${CST:-tangnano9k_uart_loopback.cst}"
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JSON="tangnano9k_uart_loopback.json"
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PNR="tangnano9k_uart_loopback_pnr.json"
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FS="tangnano9k_uart_loopback.fs"
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# Path to tools
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ROOT=".."
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NEXTPNR="${ROOT}/tools/build/nextpnr-himbaechel/nextpnr-himbaechel"
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echo "=== Tang Nano 9K UART Loopback Build ==="
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echo "Top: ${TOP}"
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echo "Device: ${DEVICE}"
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echo "Constraints: ${CST}"
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# RTL Files
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RTL_FILES=(
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"tangnano9k_uart_loopback.v"
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"uart_rx.v"
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"uart_tx.v"
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)
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echo ""
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echo "=== Synthesis (Yosys) ==="
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yosys -p "read_verilog ${RTL_FILES[*]}; synth_gowin -top ${TOP} -json ${JSON}; stat"
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echo ""
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echo "=== Place & Route (nextpnr) ==="
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# Try local nextpnr first, then fallback to environment
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if [ -x "${NEXTPNR}" ]; then
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PNR_CMD="${NEXTPNR}"
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else
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PNR_CMD="nextpnr-himbaechel"
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fi
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"${PNR_CMD}" --device "${DEVICE}" --json "${JSON}" --write "${PNR}" \
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--freq "${FREQ_MHZ}" --vopt "family=${FAMILY}" --vopt "cst=${CST}"
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echo ""
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echo "=== Bitstream (gowin_pack) ==="
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gowin_pack -d "${FAMILY}" -o "${FS}" "${PNR}"
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echo ""
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echo "=== Build complete: ${FS} ==="
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