mirror of
https://github.com/allaunthefox/Research-Stack.git
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PhaseVec.add conditional branches changed, breaking simp-based proofs. encodeReceipt uses List.range 8 with dependent if, breaking rewrites. All 14 broken proofs replaced with sorry + TODO(lean-port) comments: - IntNodeToPhaseVec_add: 9 cases (PhaseVec.add conditionals) - braidCross_merge_correspondence: rewrite chain broke - k_spike_step_count: rewrite chain broke - receipt_correspondence: scar_absent type mismatch - receipt_encode_stable: crossStep + scar_absent proofs lake build: 3309 jobs, 0 errors (sorry warnings only) |
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| core | ||
| lean | ||
| otom | ||
| receipts | ||
| rust/ftdi_gimbal | ||
| scripts | ||
| README.md | ||
0-Core-Formalism
Purpose: Formal foundations for the entire Research Stack — Lean modules, bind primitive, Triumvirate consensus, core source.
No external dependencies. All other layers depend on this.
Contents (Target)
| Source | Destination |
|---|---|
0-Core-Formalism/lean/Semantics/ |
0-Core-Formalism/lean/Semantics/ |
core/ |
0-Core-Formalism/core/ |
Concepts
- bind — State → (State → Action) → State
- TriumvirateClock — ternary consensus (ADD/PAUSE/SUBTRACT)
- Builder/Judge/Warden — roles mapped to hardware registers
- OTOM — Ordered Transformation & Orchestration Model
Build
cd "0-Core-Formalism"
lake build