mirror of
https://github.com/allaunthefox/Research-Stack.git
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226 lines
9.4 KiB
Python
226 lines
9.4 KiB
Python
#!/usr/bin/env python3
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"""
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Power Supply Computational Repurposing
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Analyzes power supply and power caps for general-purpose computation capabilities.
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"""
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import json
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from pathlib import Path
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from typing import Dict, List, Optional
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# Paths
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OUTPUT_DIR = Path("/home/allaun/Documents/Research Stack/out")
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class PowerSupplyComputational:
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"""Analyzes power supply and power caps for computation."""
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def __init__(self):
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self.power_supply = {
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"type": "Desktop Power Supply Unit (PSU)",
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"power_caps": ["470uF", "1000uF"],
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"voltage_rails": ["3.3V", "5V", "12V"],
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"computational_potential": "MEDIUM (power caps as morphic devices)"
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}
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self.power_caps = {
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"bulk_capacitors": {
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"470uF": {
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"type": "Electrolytic",
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"voltage_rating": "16-25V",
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"esr": "10-50 mΩ",
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"morphic_potential": "MEDIUM"
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},
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"1000uF": {
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"type": "Electrolytic",
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"voltage_rating": "16-25V",
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"esr": "5-20 mΩ",
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"morphic_potential": "HIGH"
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}
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},
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"decoupling_capacitors": {
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"0.1uF": {"type": "Ceramic", "morphic_potential": "HIGH"},
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"1uF": {"type": "Ceramic", "morphic_potential": "HIGH"},
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"10uF": {"type": "Ceramic", "morphic_potential": "HIGH"}
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}
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}
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self.upi_interface = {
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"state_vector": "64-bit (Voltage, Current, Jitter, Frequency)",
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"feedback_bus": "8-bit (Intensity, Temperature, Flux)",
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"control_matrix": "16-bit (Modulation, Bypass, Phase-locking)",
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"computational_potential": "HIGH (UPI for power-based computation)"
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}
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def analyze_computational_potential(self) -> Dict:
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"""Analyze computational potential of power supply."""
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analysis = {
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"power_cap_morphic": {
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"feasible": True,
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"mode": "Power cap morphic computation",
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"description": "Use power supply capacitors as morphic devices",
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"capacitance": "470uF-1000uF (bulk), 0.1uF-10uF (decoupling)",
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"throughput": "10-100 MHz (charge/discharge)",
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"latency": "10-100ns (charge/discharge)",
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"power": "5-20W (power supply)"
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},
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"voltage_rail_computation": {
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"feasible": True,
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"mode": "Voltage rail computation",
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"description": "Use voltage rail modulation for computation",
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"throughput": "Voltage limited (3.3V, 5V, 12V)",
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"latency": "1-10µs (voltage regulation)",
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"power": "10-30W"
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},
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"upi_computation": {
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"feasible": True,
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"mode": "UPI-based computation",
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"description": "Use Universal Power Interface for computation",
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"throughput": "State vector limited (64-bit)",
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"latency": "1-10µs (UPI response)",
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"power": "5-15W"
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}
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}
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return analysis
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def design_computational_approach(self) -> Dict:
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"""Design power supply-based computational approach."""
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approach = {
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"power_cap_morphic_computation": {
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"concept": "Use power caps as morphic devices",
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"implementation": "Charge/discharge capacitors for computation",
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"operations": ["charge-based arithmetic", "voltage-based state", "resonant computation"],
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"throughput": "10-100 MHz (charge/discharge)",
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"latency": "10-100ns (charge/discharge)",
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"power": "5-20W"
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},
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"voltage_rail_modulation": {
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"concept": "Use voltage rail modulation for computation",
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"implementation": "Modulate voltage rails for computational encoding",
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"operations": ["voltage arithmetic", "rail switching", "modulation"],
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"throughput": "Voltage limited (3.3V, 5V, 12V)",
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"latency": "1-10µs (voltage regulation)",
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"power": "10-30W"
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},
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"upi_state_computation": {
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"concept": "Use UPI state vector for computation",
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"implementation": "Encode computation in UPI state vector",
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"operations": ["state vector arithmetic", "feedback processing", "control matrix"],
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"throughput": "64-bit state vector",
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"latency": "1-10µs (UPI response)",
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"power": "5-15W"
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},
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"power_line_computation": {
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"concept": "Use power lines for computational signaling",
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"implementation": "Encode computation in power line signals",
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"operations": ["power line signaling", "voltage pattern computation"],
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"throughput": "Power line limited",
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"latency": "1-10µs (power line)",
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"power": "10-20W"
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}
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}
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return approach
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def estimate_performance(self) -> Dict:
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"""Estimate performance of power supply computation."""
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performance = {
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"power_cap_morphic": {
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"throughput": "10-100 MHz (charge/discharge)",
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"latency": "10-100ns (charge/discharge)",
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"precision": "6-10 bits (voltage)",
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"operations": "charge-based arithmetic",
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"power": "5-20W"
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},
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"voltage_rail": {
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"throughput": "Voltage limited (3.3V, 5V, 12V)",
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"latency": "1-10µs (voltage regulation)",
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"precision": "8-12 bits (voltage)",
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"operations": "voltage arithmetic",
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"power": "10-30W"
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},
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"upi_state": {
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"throughput": "64-bit state vector",
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"latency": "1-10µs (UPI response)",
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"precision": "64-bit (state vector)",
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"operations": "state vector arithmetic",
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"power": "5-15W"
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},
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"power_line": {
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"throughput": "Power line limited",
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"latency": "1-10µs (power line)",
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"precision": "8-12 bits (voltage)",
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"operations": "power line signaling",
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"power": "10-20W"
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}
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}
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return performance
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def run_analysis(self) -> Dict:
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"""Run power supply computational analysis."""
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print("=" * 60)
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print("POWER SUPPLY COMPUTATIONAL ANALYSIS")
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print("=" * 60)
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# Step 1: Analyze power supply
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print("\n[1/4] Analyzing power supply...")
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print(f" Type: {self.power_supply['type']}")
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print(f" Power Caps: {self.power_supply['power_caps']}")
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print(f" Voltage Rails: {self.power_supply['voltage_rails']}")
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print(f" Computational Potential: {self.power_supply['computational_potential']}")
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# Step 2: Analyze computational potential
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print("[2/4] Analyzing computational potential...")
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potential = self.analyze_computational_potential()
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print(f" Power Cap Morphic: {potential['power_cap_morphic']['feasible']}")
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print(f" Voltage Rail: {potential['voltage_rail_computation']['feasible']}")
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print(f" UPI: {potential['upi_computation']['feasible']}")
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# Step 3: Design computational approach
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print("[3/4] Designing computational approach...")
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approach = self.design_computational_approach()
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print(f" Computational modes: {len(approach)}")
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for mode, details in approach.items():
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print(f" {mode}: {details['throughput']}")
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# Step 4: Estimate performance
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print("[4/4] Estimating performance...")
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performance = self.estimate_performance()
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print(f" Power Cap Morphic: {performance['power_cap_morphic']['throughput']}")
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print(f" Voltage Rail: {performance['voltage_rail']['throughput']}")
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print(f" UPI State: {performance['upi_state']['throughput']}")
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print(f" Power Line: {performance['power_line']['throughput']}")
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print("\n" + "=" * 60)
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print("POWER SUPPLY COMPUTATIONAL ANALYSIS COMPLETE")
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print("=" * 60)
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return {
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"power_supply": self.power_supply,
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"power_caps": self.power_caps,
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"upi_interface": self.upi_interface,
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"computational_potential": potential,
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"computational_approach": approach,
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"performance_estimates": performance
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}
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if __name__ == '__main__':
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analyzer = PowerSupplyComputational()
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results = analyzer.run_analysis()
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# Save results
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output_file = OUTPUT_DIR / "power_supply_computational.json"
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with open(output_file, 'w') as f:
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json.dump(results, f, indent=2)
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print(f"\nAnalysis results saved to {output_file}")
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# Print summary
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print("\n" + "=" * 60)
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print("POWER SUPPLY COMPUTATIONAL SUMMARY")
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print("=" * 60)
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print(f"Type: {results['power_supply']['type']}")
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print(f"Power Caps: {results['power_supply']['power_caps']}")
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print(f"Computational Potential: {results['power_supply']['computational_potential']}")
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print(f"Max Throughput: {results['performance_estimates']['power_cap_morphic']['throughput']}")
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