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185 lines
6.8 KiB
Text
185 lines
6.8 KiB
Text
/-
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Semantics/Decoder.lean - Model 141 Self-Instantiating Weird Machine
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This module implements the OISC-SLUG3 engine as described in the N-Folded MMR
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Gossip EBML Schema. It executes 27 ternary opcodes while enforcing
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Integrability and Stability constraints from the simulation manifold.
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Lean is the source of truth.
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-/
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import Semantics.SLUG3
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import Semantics.Connectors
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import Semantics.DynamicCanal
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import Semantics.BraidBracket
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import Semantics.ManifoldFlow
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namespace Semantics.Decoder
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open DynamicCanal
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open Semantics.SLUG3
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open Semantics.Connectors
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open Semantics.BraidBracket
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open Semantics.ManifoldFlow
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/-- Machine State for Model 141 -/
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structure MachineState where
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pc : Nat
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stack : List Fix16
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memory : Array Fix16
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exhausted : Bool
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frustPrevX : BraidBracket.PhaseVec -- Hardware cache for P_{m-1}
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frustAniso : AnisotropyTensor -- Hardware cache for A_ij
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/-- Initial state with 1024 words of memory -/
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def MachineState.init (initialMem : List Fix16) : MachineState :=
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{ pc := 0
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, stack := []
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, memory := (initialMem ++ (List.replicate (1024 - initialMem.length) Fix16.zero)).toArray
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, exhausted := false
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, frustPrevX := BraidBracket.PhaseVec.zero
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, frustAniso := { xx := Fix16.zero, xy := Fix16.zero, yy := Fix16.zero } }
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instance : Inhabited MachineState := ⟨MachineState.init []⟩
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namespace Ports
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def ioIn : Int := -1
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def ioOut : Int := -2
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def frustPrevX : Int := -23
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def frustAniso : Int := -24
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def frustResult : Int := -25
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end Ports
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/-- Instruction format: 6 bytes
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[Opcode (1) | OperandA (2) | OperandB (2) | Result (1)]
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-/
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structure Instruction where
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op : OISCOp
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argA : Fix16
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argB : Fix16
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dest : Nat
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/-- Native Port Reading Header -/
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def MachineState.read (state : MachineState) (addr : Int) : Fix16 :=
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if addr >= 0 then
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if _hSize : 0 < state.memory.size then
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state.memory[addr.toNat % state.memory.size]!
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else
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Fix16.zero
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else match addr with
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| -25 => -- frustResult
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interlockingEnergy BraidBracket.PhaseVec.zero state.frustPrevX state.frustAniso
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| _ => Fix16.zero
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/-- Native Port Writing Header -/
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def MachineState.write (state : MachineState) (addr : Int) (val : Fix16) : MachineState :=
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if addr >= 0 then
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if _hSize : 0 < state.memory.size then
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let idx := addr.toNat % state.memory.size
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{ state with memory := state.memory.set! idx val }
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else
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state
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else match addr with
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| -23 => { state with frustPrevX := { x := val, y := Fix16.zero : PhaseVec } }
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| -24 => { state with frustAniso := { xx := val, xy := Fix16.zero, yy := Fix16.zero } }
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| _ => state
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def MachineState.pcUpdate (state : MachineState) (n : Nat) : MachineState :=
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{ state with pc := state.pc + n }
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/-- Execute a single SLUG-3 Opcode update to the state -/
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def executeOp (state : MachineState) (inst : Instruction) : MachineState :=
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let a := inst.argA
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let b := inst.argB
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let nextState := match inst.op with
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| .nop => { state with pc := state.pc + 1 }
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| .add =>
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let res := Fix16.add a b
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .sub =>
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let res := Fix16.sub a b
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .mul =>
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let res := Fix16.mul a b
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .div =>
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let res := Fix16.div a b
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .min =>
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let res := Fix16.min a b
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .max =>
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let res := Fix16.max a b
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .abs =>
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let res := Fix16.abs a
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .neg =>
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let res := Fix16.neg a
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .shl =>
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let res := Fix16.mul a (Fix16.mk ((2 ^ (a.raw.toNat % 16)) * 65536).toUInt32)
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .shr =>
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let res := Fix16.div a (Fix16.mk ((2 ^ (a.raw.toNat % 16)) * 65536).toUInt32)
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .and =>
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let res : Fix16 := ⟨a.raw &&& b.raw⟩
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .or =>
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let res : Fix16 := ⟨a.raw ||| b.raw⟩
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .xor =>
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let res : Fix16 := ⟨a.raw ^^^ b.raw⟩
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .eq =>
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let res := if a == b then Fix16.one else Fix16.zero
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .lt =>
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let res := if a.raw < b.raw then Fix16.one else Fix16.zero
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .gt =>
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let res := if a.raw > b.raw then Fix16.one else Fix16.zero
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .load =>
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let res := state.read (Int.ofNat a.raw.toNat)
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MachineState.pcUpdate (state.write (Int.ofNat inst.dest) res) 1
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| .store =>
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MachineState.pcUpdate (state.write (Int.ofNat a.raw.toNat) b) 1
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| .jmp => { state with pc := a.raw.toNat % state.memory.size }
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| .jz =>
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if a.raw == 0 then { state with pc := b.raw.toNat % state.memory.size }
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else { state with pc := state.pc + 1 }
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| .jnz =>
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if a.raw != 0 then { state with pc := b.raw.toNat % state.memory.size }
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else { state with pc := state.pc + 1 }
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| .call =>
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{ state with pc := a.raw.toNat % state.memory.size, stack := (Fix16.mk (state.pc + 1).toUInt32) :: state.stack }
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| .ret =>
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match state.stack with
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| [] => { state with exhausted := true }
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| s :: ss => { state with pc := s.raw.toNat % state.memory.size, stack := ss }
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| .dup => { state with stack := a :: state.stack, pc := state.pc + 1 }
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| .drop =>
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match state.stack with
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| [] => { state with pc := state.pc + 1 }
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| _ :: ss => { state with stack := ss, pc := state.pc + 1 }
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| .halt => { state with exhausted := true }
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nextState
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def interlockingEnergyPort
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(currentX prevX : BraidBracket.PhaseVec)
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(a : AnisotropyTensor) : Fix16 :=
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interlockingEnergy currentX prevX a
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def guardIntegrity (_state : MachineState) (v : BraidBracket.PhaseVec) (acc : BraidBracket.PhaseVec) (ε : Fix16) : Bool :=
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-- Link to Connector 1
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isIntegrable (BraidBracket.PhaseVec.add acc v) [v] ε
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/-- Max Bandwidth Guard: Link to Connector 2 (Parcae/OMT) -/
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def guardBandwidth (norm : SpectralNorm) (nodes : Nat) (τ : Fix16) (ops : Nat) : Bool :=
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-- Halt if operations per frame exceed bandwidth Ω_max
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let limit := (omegaMax norm nodes τ).raw.toNat
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ops < limit
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end Semantics.Decoder
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