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9th dimension: networkLatencyCost (12% weight) - latencyClass: 0=local, 1=near, 2=far, 3=derp - DERP relay (129ms) → qHalf cost → σ=1.0 (coarse BRAM) - Local (<1ms) → qZero cost → σ=0.0 (exact BRAM) Latency maps to FPGA voltage mode: local(0) → 1.2V σ₀ (exact) BRAM Bank 0 near(1) → 1.0V σ₁ (normal) BRAM Bank 1 far(2) → 0.8V σ₂ (approx) BRAM Bank 2 derp(3) → 0.6V σ₃ (coarse) BRAM Bank 3 Consistent latency is computable — not noise, but a fixed phase offset. The latency IS the computation: it determines which precision to use. Weights rebalanced: kernel 20→18, street 14→12, topology 16→14, substrate 12→10, proof 14→12, risk 14→12, latency +12. lake build: 2 jobs, 0 errors |
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| lean | ||
| otom | ||
| receipts | ||
| rust/ftdi_gimbal | ||
| README.md | ||
0-Core-Formalism
Purpose: Formal foundations for the entire Research Stack — Lean modules, bind primitive, Triumvirate consensus, core source.
No external dependencies. All other layers depend on this.
Contents (Target)
| Source | Destination |
|---|---|
0-Core-Formalism/lean/Semantics/ |
0-Core-Formalism/lean/Semantics/ |
core/ |
0-Core-Formalism/core/ |
Concepts
- bind — State → (State → Action) → State
- TriumvirateClock — ternary consensus (ADD/PAUSE/SUBTRACT)
- Builder/Judge/Warden — roles mapped to hardware registers
- OTOM — Ordered Transformation & Orchestration Model
Build
cd "0-Core-Formalism"
lake build