Commit graph

4 commits

Author SHA1 Message Date
c7c7809ffb feat(tests): add Coq test harness, milestone: 12/12 ports have tests 2026-06-30 17:59:38 -05:00
64e54d937d feat(tests): add C, C++, Scala, Fortran, Octave test harnesses
Test harnesses added for all remaining AVM ISA ports:
- C (9 tests): arithmetic, saturation, comparison, overflow, control flow, locals
- C++ (9 tests): same test suite with std::optional-based error handling
- Scala (9 tests): functional style with Option return
- Fortran (4 tests): add, div, saturation, control flow (minimal Fortran test)
- Octave/MATLAB (4 tests): basic operations test

Milestone: 10/12 ports have test harnesses. Coq still pending.
2026-06-30 17:59:19 -05:00
f6cbddcbf2 feat(tests): Python AVM port rewrite + test harness, Go test harness
Python port rewritten to match spec:
- Added Q0_16, PUSH_Q0, PUSH_BOOL as separate opcodes
- Added V6 comparison (lt_q16_v6)
- Added floor division (Lean Int.ediv)
- Added stack depth limit (AVM_MAX_STACK = 1024)
- Added type checking in exec_prim
- All 10 tests passing

Go AVM port: added test_avm_test.go with 8 test cases

Milestone: Python → , Go → 🔄
2026-06-30 17:56:09 -05:00
56b734cbc3 docs: add milestone for AVM ISA 1:1 port coverage across all LSP languages 2026-06-30 17:50:02 -05:00