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SilverSight/rust
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allaun aeb87d86c8 fix(avm-ports): align all 3 ports with Lean reference 
Fixes applied to Rust, Julia, and R AVM ISA ports:

1. Division rounding: use floor division (matching Lean Int.ediv)
2. Clamp range: symmetric [-2147483647, 2147483647] for Q16_16,
   [-32767, 32767] for Q0_16 (preserves negation involution)
3. V6 sign-decomposition comparison for ltQ16
4. Stack depth limit: maxStackDepth = 1024 with StackOverflow error
5. Added AVM-specific constants and helpers to each port

All three ports now match the Lean reference specification.
2026-06-30 17:37:01 -05:00
..
src fix(avm-ports): align all 3 ports with Lean reference 2026-06-30 17:37:01 -05:00
target fix(avm-ports): align all 3 ports with Lean reference 2026-06-30 17:37:01 -05:00
tests feat(wolfram): add Wolfram Alpha MCP server + SOPS-encrypted API key 2026-06-30 17:28:22 -05:00
Cargo.lock feat(wolfram): add Wolfram Alpha MCP server + SOPS-encrypted API key 2026-06-30 17:28:22 -05:00
Cargo.toml feat(wolfram): add Wolfram Alpha MCP server + SOPS-encrypted API key 2026-06-30 17:28:22 -05:00
README.md feat(wolfram): add Wolfram Alpha MCP server + SOPS-encrypted API key 2026-06-30 17:28:22 -05:00

README.md

SilverSight — Language Port

Source of truth: /home/allaun/SilverSight/formal/ (Lean 4)

This directory mirrors the Lean module structure. Each file implements the same theorems/algorithms in this language, providing independent cross-validation across runtimes.

Module map: CoreFormalism/ → formal/CoreFormalism/ (braid, Q16_16, Sidon) SilverSight/ → formal/SilverSight/ (PIST, AVMIsa, RRC) BindingSite/ → formal/BindingSite/ (DNA, hachimoji) PVGS_DQ_Bridge/ → formal/PVGS_DQ_Bridge/ UniversalEncoding/ → formal/UniversalEncoding/ nuvmap/ → python/nuvmap/ (NUVMAP projection)