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HCMR (HardwareContentionMarkov.lean, Research Stack, 0 sorries) provides the hardware performance model for the chiral CRT multiplexer. Connection: - Markov self-loop probability = Sidon collision rate - Mixing rate = multiplexer throughput - Cache hierarchy (L1→L2→L3→DRAM) = TreeBraid hierarchy (leaf→node→root) - COUCH gate = contention filter (rejects high self-loop configs) HCMR measured self-loop probabilities: SUBLEQ (word): 0.823 (82.3% contention) CL AVX-512: 0.885 (88.5% contention) Ring dispatch: 0.0 (0% contention — perfectly Sidon-orthogonal) Throughput formula: base_rate × (1 - self_loop_prob) = base_rate × Sidon_pass_rate This predicts multiplexer performance: Ring dispatch (q >> 1): 4/4 channels usable (100% Sidon) Word SUBLEQ (q ≈ 1.5): 0.7/4 channels usable (18% Sidon) CL AVX-512 (q ≈ 1.0): 0.5/4 channels usable (12% Sidon) Confirms q-profile sweep finding: q > 1 = 100% Sidon = ring dispatch regime. Port plan: HCMR → formal/SilverSight/HCMR/ following pipeline-math 5-file pattern, with capstone theorem connecting Sidon pass rate to HCMR throughput. |
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| .. | ||
| adversarial_review | ||
| build_logs | ||
| concept_map | ||
| diagrams | ||
| first_principles | ||
| frozen_template | ||
| fundamental_math | ||
| living | ||
| refactor | ||
| research | ||
| reviews | ||
| ARCHITECTURE.md | ||
| CLAIMS_STATUS.md | ||
| cmix_epigenetic_analysis.md | ||
| FIX_DESIGN.md | ||
| generate_porting_candidates.py | ||
| generate_project_map.py | ||
| generate_research_stack_usage_map.py | ||
| GLOSSARY.md | ||
| GLOSSARY_ALLOWLIST.md | ||
| GOORMAGHTIGH_SPECTRAL.md | ||
| gw_compression_honest_result.md | ||
| PROJECT_MAP.json | ||
| PROJECT_MAP.md | ||
| research_stack_usage_graph_thumb.png | ||
| review_findings.md | ||
| SPECTRAL_CODEBOOK_ANALYSIS.md | ||
| SPECTRAL_CODEBOOK_GENERATOR.md | ||
| THEOREM_STACK.md | ||
| weird_machine_conservation_law.md | ||
