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allaun f6cbddcbf2 feat(tests): Python AVM port rewrite + test harness, Go test harness 
Python port rewritten to match spec:
- Added Q0_16, PUSH_Q0, PUSH_BOOL as separate opcodes
- Added V6 comparison (lt_q16_v6)
- Added floor division (Lean Int.ediv)
- Added stack depth limit (AVM_MAX_STACK = 1024)
- Added type checking in exec_prim
- All 10 tests passing

Go AVM port: added test_avm_test.go with 8 test cases

Milestone: Python → ✅, Go → 🔄
2026-06-30 17:56:09 -05:00
..
AVMIsa feat(tests): Python AVM port rewrite + test harness, Go test harness 2026-06-30 17:56:09 -05:00
CoreFormalism feat(avm-ports): port AVM ISA to all 12 scientific languages 2026-06-30 17:42:38 -05:00
README.md feat(wolfram): add Wolfram Alpha MCP server + SOPS-encrypted API key 2026-06-30 17:28:22 -05:00

README.md

SilverSight — Language Port

Source of truth: /home/allaun/SilverSight/formal/ (Lean 4)

This directory mirrors the Lean module structure. Each file implements the same theorems/algorithms in this language, providing independent cross-validation across runtimes.

Module map: CoreFormalism/ → formal/CoreFormalism/ (braid, Q16_16, Sidon) SilverSight/ → formal/SilverSight/ (PIST, AVMIsa, RRC) BindingSite/ → formal/BindingSite/ (DNA, hachimoji) PVGS_DQ_Bridge/ → formal/PVGS_DQ_Bridge/ UniversalEncoding/ → formal/UniversalEncoding/ nuvmap/ → python/nuvmap/ (NUVMAP projection)