Research-Stack/4-Infrastructure/hardware
Devin AI 0c9efac330 chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR
Squash the four overlapping feature branches into a single change set against
main, eliminating cross-PR merge conflicts and the duplicated CI-fix scripts.

What this brings in (merge order #79 -> #80 -> #81 -> #89):
- #79 refactor(infra): shared utilities (4-Infrastructure/lib/*: q16, hashing,
  jsonl, fraction_utils) + the scripts/math-first/* validators that the
  math-check CI requires.
- #80 feat(lean): Semantics.E8Sidon (1025 lines) -- Eisenstein coefficient
  identity E4^2 = E8 and the Sidon framework. E4_sq_eq_E8_coeff is fully proved
  (all Fourier-coefficient extraction machine-checked); the single residual gap
  is pinned to E4_sq_eq_E8_qExpansion (Mathlib lacks the valence formula /
  dim M8 = 1). 4 sorries + 1 axiom (e8_additive_completeness), all TODO(lean-port).
- #81 refactor(lean): Float-free FixedPoint core (integer-only sqrt/log2/expNeg).
  E8Sidon.lean kept at #80's final 1025-line version (the #81 intermediate
  438-line copy was overridden by merge order).
- #89 feat(lean): Semantics.RRC.PolyFactorIdentity -- short-sleeve polynomial
  detection at the zerocopy limb boundary; now imports Semantics.E8Sidon for
  sigma3/sigma7/convolutionLHS (single source of truth) instead of inlining them.

Conflict resolution:
- flake.nix -> canonical rs-surface removal (Garnix shutdown).
- scripts/math-first/* -> byte-identical across branches, clean.
- .cursorrules / AGENTS.md -> unified; baselines + sorry inventory refreshed.

Verification:
- lake build (default aggregator): 3573 jobs, 0 errors.
- lake build Semantics.RRC.PolyFactorIdentity (E8Sidon + FixedPoint + PolyFactor):
  3655 jobs, 0 errors. Witnesses verified (sigma7 4 = 16513, convolutionLHS 6 = 2350).
- Python tests: 68/68 pass.

Note: the "Workers Builds: researchstack" check is a preexisting external
Cloudflare build unrelated to this change (no branch touches 4-Infrastructure/cloudflare/).

Build: 3573 jobs (default), 3655 jobs (narrow), 0 errors
Co-Authored-By: Allaun Silverfox <bigdataiscoming+9i37y6j2@protonmail.com>
2026-06-16 02:01:31 +00:00
..
build_metamanifold Consolidate research stack updates 2026-05-05 21:09:48 -05:00
emergency_boot feat(hardware): Emergency Boot Witness reference implementation 2026-05-27 23:00:39 -05:00
sparkle fix(infra): configure sparkle build script to support system path fallback 2026-05-28 15:03:17 -05:00
abc.history initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
adaptive_fabric_connector.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
batch_lean_checker.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
batch_lean_checker.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
batch_lean_checker_parallel.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
Blitter6502OISC_small.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
blitter_memory_map.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
braid_serial.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
braid_serial_main.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
braided_field_genetic_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
braided_field_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
bram_partial_lut.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
build_cff_accelerator.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
build_cff_scanner.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
build_dvi_texel.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
build_fractal.sh feat: fractal dimension — DBC algorithm (Python + FPGA) 2026-05-29 20:45:21 -05:00
build_hutter_symbol_surface.sh Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
build_loopback.sh feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
build_metamanifold_prover.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
build_metamanifold_prover_himbaechel.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
build_metamanifold_prover_yosys.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
build_q16_lut.sh feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
build_research_stack.sh feat: spatial hash grid — GPU-style particle physics (Python + FPGA) 2026-05-30 01:25:19 -05:00
build_rrc_q16_accel.sh Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
build_uart_beacon.sh Stage stack solidification source slice 2026-05-11 22:08:10 -05:00
cff_accelerator.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_accelerator.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
cff_invariant_scanner.fs collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cff_invariant_scanner_pnr.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
cmyk_adaptive_router.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
dvi_texel_transmitter.json collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
dvi_texel_transmitter.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
ee_stress_requirements.txt Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
ee_virtual_stress_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
famm_verilator_bench.v collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
FAMM_VERILATOR_SETUP.md collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
fractal_box_counter.v feat: fractal dimension — DBC algorithm (Python + FPGA) 2026-05-29 20:45:21 -05:00
fractal_fd_selector.v feat: fractal dimension — DBC algorithm (Python + FPGA) 2026-05-29 20:45:21 -05:00
goertzel_filter_bank.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
gpu_fpga_distributed_checker.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
gpu_fpga_verification_report.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
hamiltonian_primitives_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
highs_pivot_accelerator.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
hutter_symbol_substitution_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
integrated_prover_pipeline.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
integrated_prover_report.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
jupiter_phi_self_recovery_probe.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
lean_dependency_dag.dot Consolidate research stack updates 2026-05-05 21:09:48 -05:00
lean_dependency_dag_parallel.dot Consolidate research stack updates 2026-05-05 21:09:48 -05:00
lean_dependency_dag_parallel.svg Consolidate research stack updates 2026-05-05 21:09:48 -05:00
lean_hardware_checker.py Consolidate research stack updates 2026-05-05 21:09:48 -05:00
Makefile.metamanifold Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
mechanical_cycle.vcd initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
mechanical_cycle_harness.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
mechanical_cycle_sim initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
metamanifold.fs Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_pnr.json Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin.v Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin_minimal.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_gowin_simple.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_minimal.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_minimal.v Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_tb.cpp Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_test.cst Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_test.v Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metamanifold_prover_trace.vcd Consolidate research stack updates 2026-05-05 21:09:48 -05:00
metaprobe_stress_sensor.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
mode_multiplexed_dsp_slice.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
moldable_transfer_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
morphic_scalar_fpga.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
morphic_scalar_fpga_optimized.cst initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
morphic_scalar_fpga_optimized.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
morphic_scalar_s3c_integrated.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
nii_surface_driver.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
noise_stability_sim.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
pbacs_1bit_transport_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
polariton_mimo_spectrum_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
polaron_polariton_braid_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
probe_serial_ports.py chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
q16_lut_core.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
q16_lut_core.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
q16_lut_top.fs feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
q16_lut_top.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
q16_lut_top.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
q16_lut_top_pnr.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
research_stack_tangnano9k.cst feat: unified FPGA bitstream for Tang Nano 9K — BUILD SUCCESSFUL 2026-05-28 16:32:05 -05:00
research_stack_top.fs chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
research_stack_top.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
research_stack_top.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
research_stack_top_pnr.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
rgflow_codebase_reconfiguration_review.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
run_famm_verilator_bench.sh collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
run_metamanifold_sim.sh Consolidate research stack updates 2026-05-05 21:09:48 -05:00
s3c_manifold_fpga.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
scale_space_bram.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
SIGNAL_ENCODERS_DOCUMENTATION.md Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spatial_hash_bram.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
spatial_hash_selector.v feat: spatial hash grid — GPU-style particle physics (Python + FPGA) 2026-05-30 01:25:19 -05:00
spectral_encoder.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder_simple_spice.cir Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder_spice.cir Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
spectral_encoder_tb.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_12_to_4_reduction.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_absurd_genetics_stress.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_connectome_reconfiguration_runner.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_dna_substitution_alignment.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_extension_failure_probe.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_force_regime_model.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_genus3_residual_boat.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_lagrangian_eigen_probe.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_lagrangian_exact_average.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_lagrangian_underverse_closure.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_projection_sensitivity_probe.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_residual_accounting_probe.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_rgflow_prune_probe.py Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_signed_axis_graph.graphml Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
standard_model_signed_axis_graph.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_underverse_manifold_shape.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
standard_model_w_conservation_guard.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
tangnano9k_dvi.cst collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
tangnano9k_hutter_symbol_surface.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tangnano9k_q16_lut.cst feat: wire pipeline into VCN substrate + FPGA bitstream for Q16 LUT 2026-05-28 15:02:13 -05:00
tangnano9k_research_stack.cst chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
tangnano9k_rrc_q16_accel.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tangnano9k_uart_beacon.v feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
tangnano9k_uart_loopback.cst initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
tangnano9k_uart_loopback.fs chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
tangnano9k_uart_loopback.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
tangnano9k_uart_loopback.v feat(infra): compile and SRAM-flash UART beacon with reset bypass 2026-05-28 14:10:46 -05:00
tangnano9k_uart_loopback_pnr.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
tangnano9k_uart_swapped.cst Stage stack solidification source slice 2026-05-11 22:08:10 -05:00
tb_famm_bench.cpp collapse: prover orchestration layers, FAMM verilator harness, swarm topological prober, spec sheets, virtual FPGA system tests, merge conflict resolution 2026-05-06 23:42:01 -05:00
tb_hutter_symbol_substitution_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tb_metamanifold_prover.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tb_pbacs_1bit_transport_core.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
tb_uart_test.v fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 2026-05-28 21:42:11 -05:00
test_fpga.py chore(consolidation): integrate E8Sidon stack (PRs #79 #80 #81 #89) into one PR 2026-06-16 02:01:31 +00:00
tmr_oepi_safety_fsm.v fix(adversarial-review): resolve 35 critical coding bugs across 8 subsystems 2026-05-31 23:38:03 -05:00
topological_residual_engine.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
TOSLINK_EDGE_CARRIER_TEMPLATE.kicad_mod Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
toslink_revA_kicad_template_notes.md Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
uart_rx.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
uart_test.cst chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
uart_test.fs chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
uart_test.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
uart_test.v fix: UART bug (retransmit) + auto-start + LED heartbeat + sim verification 2026-05-28 21:42:11 -05:00
uart_test_pnr.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
uart_test_synth.json chore: commit accumulated working tree changes 2026-05-30 00:10:02 -05:00
uart_tx.v initial: sovereign research stack (consolidated, weightless, and lfs-optimized) 2026-05-04 18:11:36 -05:00
voltage_mode_controller.v feat: HiGHS integration, scale space solver, adjugate matrix, FPGA voltage/BRAM modules 2026-05-28 15:42:14 -05:00
wavefront_emitter.v Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00
wavefront_emitter_tb.cpp Track remaining source and documentation inventory 2026-05-11 22:18:31 -05:00