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77 lines
3.1 KiB
Markdown
77 lines
3.1 KiB
Markdown
# x86_64 Architecture Specifications Comparison
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## Overview
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This document catalogs the official x86_64 (AMD64/Intel 64) architecture specifications from both Intel and AMD, and provides a comparison of their implementations.
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## Official Specification Sources
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### Intel Specifications
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- **Intel® 64 and IA-32 Architectures Software Developer's Manual**
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- URL: https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html
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- Available as:
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- Combined volume (all 4 volumes in one)
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- Four-volume set
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- Ten-volume set
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- Volume 1: Basic Architecture
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- Volume 2: Instruction Set Reference (A-M)
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- Volume 2: Instruction Set Reference (N-Z)
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- Volume 3: System Programming Guide
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- Volume 4: Model-Specific Registers
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### AMD Specifications
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- **AMD64 Architecture Programmer's Manual**
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- Combined Volumes 1-5: https://kib.kiev.ua/x86docs/AMD/AMD64/40332-r4.00.pdf (Rev 4.00, April 2020)
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- Volume 1: Application Programming (Pub 24592)
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- Volume 2: System Programming (Pub 24593)
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- Volume 3: General-Purpose and System Instructions (Pub 24594)
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- Volume 4: 128-Bit Media and x87 Floating-Point Instructions (Pub 26568)
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- Volume 5: 64-Bit Media and x87 Floating-Point Instructions (Pub 26569)
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- **AMD64 Technology Documentation Portal**: https://docs.amd.com/
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## Key Architectural Differences
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### Origin and Naming
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- **AMD64**: Originally developed by AMD as an extension to x86 architecture
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- **Intel 64**: Intel's implementation of AMD64 (formerly called EM64T)
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- Both are binary compatible at the instruction set level
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### Register Extensions
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Both implementations extend the x86 architecture with:
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- 64-bit general-purpose registers (RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP)
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- 8 additional 64-bit registers (R8-R15)
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- 64-bit instruction pointer (RIP)
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- 64-bit flags register (RFLAGS)
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### Mode of Operation
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- **Legacy Mode**: Runs existing 16-bit and 32-bit x86 applications
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- **Long Mode**:
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- 64-bit mode (native 64-bit operation)
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- Compatibility mode (runs 32-bit protected mode applications)
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### Memory Addressing
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- **Virtual Address**: 48 bits (current implementations)
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- **Physical Address**: Up to 52 bits (varies by implementation)
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- **Canonical Addressing**: Address bits 48-63 must be sign-extended
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## Implementation-Specific Features
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### Intel-Specific Extensions
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- Intel Virtualization Technology (Intel VT-x)
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- Intel Trusted Execution Technology (TXT)
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- Intel SGX (Software Guard Extensions)
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- Intel MPX (Memory Protection Extensions)
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- Intel TSX (Transactional Synchronization Extensions)
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### AMD-Specific Extensions
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- AMD-V (AMD Virtualization)
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- AMD Secure Processor / Platform Security Processor (PSP)
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- AMD SME (Secure Memory Encryption)
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- AMD SEV (Secure Encrypted Virtualization)
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- CLZERO (Cache Line Zero instruction)
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## Research Stack Status
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The research stack does not currently contain local copies of these specification documents. The specifications must be accessed from the official vendor URLs above.
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## References
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- Intel SDM: https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html
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- AMD64 Manuals: https://kib.kiev.ua/x86docs/AMD/AMD64/
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